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1

Power Dissipation of the Network-on-Chip in Multi-Processor System-on-Chip Dedicated for Video Coding Applications

Dragomir Milojevic, Luc Montperrus, Diederik Verkest

Journal:

Journal of Signal Processing Systems

Year:

2009

Language:

english

File:

PDF, 570 KB

english, 2009

2

Architectural strategies in standard-cell design for the 7 nm and beyond technology node

Sherazi, Syed Muhammad Yasser, Chava, Bharani, Debacker, Peter, Bardon, Marie Garcia, Schuddinck, Pieter, Firouzi, Farshad, Raghavan, Praveen, Mercha, Abdelkarim, Verkest, Diederik, Ryckaert, Julien

Journal:

Journal of Micro/Nanolithography MEMS and MOEMS

Year:

2016

Language:

english

File:

PDF, 6.11 MB

english, 2016

3

[IEEE 2019 Symposium on VLSI Technology - Kyoto, Japan (2019.6.9-2019.6.14)] 2019 Symposium on VLSI Technology - Economics of semiconductor scaling - a cost analysis for advanced technology node

Mallik, A., Ryckaert, J., Kim, R-H., Debacker, P., Decoster, S., Lazzarino, F., Ritzenthaler, R., Horiguchi, N., Verkest, D., Mocuta, A.

Year:

2019

Language:

english

File:

PDF, 1.02 MB

english, 2019

4

Vertical GAAFETs for the Ultimate CMOS Scaling

Yakimets, Dmitry, Eneman, Geert, Schuddinck, Pieter, Bao, Trong Huynh, Bardon, Marie Garcia, Raghavan, Praveen, Veloso, Anabela, Collaert, Nadine, Mercha, Abdelkarim, Verkest, Diederik, Thean, Aaron V

Journal:

IEEE Transactions on Electron Devices

Year:

2015

Language:

english

File:

PDF, 4.24 MB

english, 2015

5

[IEEE 2017 IEEE International Electron Devices Meeting (IEDM) - San Francisco, CA, USA (2017.12.2-2017.12.6)] 2017 IEEE International Electron Devices Meeting (IEDM) - Stacked nanosheet fork architecture for SRAM design and device co-optimization toward 3nm

Weckx, P., Ryckaert, J., Putcha, V., De Keersgieter, A., Boemmels, J., Schuddinck, P., Jang, D., Yakimets, D., Bardon, M. G., Ragnarsson, L.-A., Raghavan, P., Kim, R. R., Spessot, A., Verkest, D., Moc

Year:

2017

Language:

english

File:

PDF, 679 KB

english, 2017

6

[IEEE 2019 IEEE International Electron Devices Meeting (IEDM) - San Francisco, CA, USA (2019.12.7-2019.12.11)] 2019 IEEE International Electron Devices Meeting (IEDM) - Novel forksheet device architecture as ultimate logic scaling device towards 2nm

Weckx, P., Gupta, M., Oniki, Y., Ragnarsson, L.-A., Horiguchi, N., Spessot, A., Verkest, D., Ryckaert, J., Litta, E. Dentoni, Yakimets, D., Matagne, P., Schuddinck, P., Jang, D., Chehab, B., Baert, R.

Year:

2019

Language:

english

File:

PDF, 647 KB

english, 2019

7

Machine Chameleon It's a PDA. It's a cellphone. It's a game console. The only handheld you'll ever need is right around the corner.

Journal:

Year:

2003

Language:

english

File:

PDF, 3.06 MB

english, 2003

8

[IEEE ESSDERC 2014 - 44th European Solid State Device Research Conference - Venice Lido, Italy (2014.9.22-2014.9.26)] 2014 44th European Solid State Device Research Conference (ESSDERC) - Circuit and process co-design with vertical gate-all-around nanowire FET technology to extend CMOS scaling for 5nm and beyond technologies

Bao, T. Huynh, Yakimets, D., Ryckaert, J., Ciofi, I., Baert, R., Veloso, A., Boemmels, J., Collaert, N., Roussel, P., Demuynck, S., Raghavan, P., Mercha, A., Tokei, Z., Verkest, D., Thean, A. V-Y., Wa

Year:

2014

Language:

english

File:

PDF, 3.66 MB

english, 2014

9

[IEEE 2015 International Conference on IC Design & Technology (ICICDT) - Leuven, Belgium (2015.6.1-2015.6.3)] 2015 International Conference on IC Design & Technology (ICICDT) - Design technology co-optimization for enabling 5nm gate-all-around nanowire 6T SRAM

Huynh-Bao, Trong, Sakhare, Sushil, Ryckaert, Julien, Yakimets, Dmitry, Mercha, Abdelkarim, Verkest, Diederik, Thean, Aaron Voon-Yew, Wambacq, Piet

Year:

2015

Language:

english

File:

PDF, 748 KB

english, 2015

10

[IEEE 2015 International Conference on IC Design & Technology (ICICDT) - Leuven, Belgium (2015.6.1-2015.6.3)] 2015 International Conference on IC Design & Technology (ICICDT) - Dimensioning for power and performance under 10nm: The limits of FinFETs scaling

Bardon, M. Garcia, Schuddinck, P., Raghavan, P., Jang, D., Yakimets, D., Mercha, A., Verkest, D., Thean, A.

Year:

2015

Language:

english

File:

PDF, 3.23 MB

english, 2015

11

Trades-off between lithography line edge roughness and error-correcting codes requirements for NAND Flash memories

Pavel Poliakov, Pieter Blomme, Alessandro Vaglio Pret, Miguel Miranda Corbalan, Roel Gronheid, Diederik Verkest, Jan Van Houdt, Wim Dehaene

Journal:

Microelectronics Reliability

Year:

2012

Language:

english

File:

PDF, 732 KB

english, 2012

12

Compensation for obesity-induced insulin resistance in dogs: assessment of the effects of leptin, adiponectin, and glucagon-like peptide-1 using path analysis

K.R. Verkest, L.M. Fleeman, J.M. Morton, K. Ishioka, J.S. Rand

Journal:

Domestic Animal Endocrinology

Year:

2011

Language:

english

File:

PDF, 1.65 MB

english, 2011

13

Architecture Exploration for a Reconfigurable Architecture Template

Bingfeng Mei,, Lambrechts, A., Verkest, D., Mignolet, J., Lauwereins, R.

Journal:

IEEE Design & Test of Computers

Year:

2005

Language:

english

File:

PDF, 178 KB

english, 2005

14

[IEEE 2014 72nd Annual Device Research Conference (DRC) - Santa Barbara, CA, USA (2014.6.22-2014.6.25)] 72nd Device Research Conference - Lateral versus vertical gate-all-around FETs for beyond 7nm technologies

Yakimets, D., Bao, T. Huynh, Bardon, M. Garcia, Dehan, M., Collaert, N., Mercha, A., Tokei, Z., Thean, A., Verkest, D., De Meyer, K.

Year:

2014

Language:

english

File:

PDF, 458 KB

english, 2014

15

[IEEE 2012 IEEE International Electron Devices Meeting (IEDM) - San Francisco, CA, USA (2012.12.10-2012.12.13)] 2012 International Electron Devices Meeting - Opportunities and challenges in device scaling by the introduction of EUV lithography

Ronse, K., De Bisschop, P., Vandenberghe, G., Hendrickx, E., Gronheid, R., Pret, A. Vaglio, Mallik, A., Verkest, D., Steegen, A.

Year:

2012

Language:

english

File:

PDF, 439 KB

english, 2012

16

IRE standards on electron tubes: Definition of terms, 1962 (62 IRE 7. S2)

Ghez, C., Miranda, M., Vandecappelle, A., Catthoor, F., Verkest, D.

Journal:

Proceedings of the IEEE

Year:

1963

Language:

english

File:

PDF, 164 KB

english, 1963

17

Energy-aware runtime scheduling for embedded-multiprocessor SOCs

Peng Yang,, Chung Wong,, Marchal, P., Catthoor, F., Desmet, D., Verkest, D., Lauwereins, R.

Journal:

IEEE Design & Test of Computers

Year:

2001

Language:

english

File:

PDF, 186 KB

english, 2001

18

[IEEE 2014 IEEE Symposium on VLSI Technology - Honolulu, HI, USA (2014.6.9-2014.6.12)] 2014 Symposium on VLSI Technology (VLSI-Technology): Digest of Technical Papers - Group IV channels for 7nm FinFETs: Performance for SoCs power and speed metrics

Bardon, M. Garcia, Raghavan, P., Eneman, G., Schuddinck, P., Dehan, M., Mercha, A., Thean, A., Verkest, D., Steegen, A.

Year:

2014

Language:

english

File:

PDF, 1.43 MB

english, 2014

19

Embedded Software for SoC || Introduction to Hardware Abstraction Layers for SoC

Jerraya, Ahmed Amine, Yoo, Sungjoo, Verkest, Diederik, Wehn, Norbert

Year:

2004

Language:

english

File:

PDF, 575 KB

english, 2004

20

[IEEE 2015 IEEE International Interconnect Technology Conference and 2015 IEEE Materials for Advanced Metallization Conference (IITC/MAM) - Grenoble, France (2015.5.18-2015.5.21)] 2015 IEEE International Interconnect Technology Conference and 2015 IEEE Materials for Advanced Metallization Conference (IITC/MAM) - Variability of quadruple-patterning interconnect processes

Baert, Rogier, Ciofi, Ivan, Wilson, Christopher J., Gonzalez, Victor Vega, Bommels, Jurgen, Tokei, Zsolt, Ryckaert, Julien, Raghavan, Praveen, Mercha, Abdelkarim, Verkest, Diederik

Year:

2015

Language:

english

File:

PDF, 177 KB

english, 2015

21

[IEEE 2015 IEEE Custom Integrated Circuits Conference - CICC 2015 - San Jose, CA, USA (2015.9.28-2015.9.30)] 2015 IEEE Custom Integrated Circuits Conference (CICC) - Holisitic device exploration for 7nm node

Raghavan, P., Bardon, M. Garcia, Jang, D., Schuddinck, P., Yakimets, D., Ryckaert, J., Mercha, A., Horiguchi, N., Collaert, N., Mocuta, A., Mocuta, D., Tokei, Z., Verkest, D., Thean, A., Steegen, A.

Year:

2015

Language:

english

File:

PDF, 995 KB

english, 2015

22

[IEEE Conference Record. Thirty-Fifth Asilomar Conference on Signals, Systems and Computers - Pacific Grove, CA, USA (2001.11.4-2001.11.7)] Conference Record of Thirty-Fifth Asilomar Conference on Signals, Systems and Computers (Cat.No.01CH37256) - Design of a secure, intelligent, and reconfigurable Web cam using a C based system design flow

Verkest, D., Desmet, D., Avasare, P., Coene, P., Decneut, S., Hendrickx, F., Marescaux, T., Mignolet, J.-Y., Pasko, R., Schaumont, P.

Year:

2001

Language:

english

File:

PDF, 621 KB

english, 2001

23

[IEEE 2015 IEEE Asian Solid-State Circuits Conference (A-SSCC) - Xia'men, China (2015.11.9-2015.11.11)] 2015 IEEE Asian Solid-State Circuits Conference (A-SSCC) - A digital intensive circuit for low-frequency noise monitoring in 28nm CMOS

Parvais, Bertrand, Wambacq, Piet, Mercha, Abdelkarim, Verkest, Diederik, Thean, Aaron, Sawada, Ken, Nomoto, Kazuki, Oishi, Tetsuya, Ammo, Hiroaki

Year:

2015

Language:

english

File:

PDF, 765 KB

english, 2015

24

[IEEE 2015 International Conference on IC Design & Technology (ICICDT) - Leuven, Belgium (2015.6.1-2015.6.3)] 2015 International Conference on IC Design & Technology (ICICDT) - Modeling FinFET metal gate stack resistance for 14nm node and beyond

Miyaguchi, Kenichi, Parvais, Bertrand, Ragnarsson, Lars-Ake, Wambacq, Piet, Raghavan, Praveen, Mercha, Abdelkarim, Mocuta, Anda, Verkest, Diederik, Thean, Aaron

Year:

2015

Language:

english

File:

PDF, 878 KB

english, 2015

25

[IEEE 2015 IEEE Custom Integrated Circuits Conference - CICC 2015 - San Jose, CA, USA (2015.9.28-2015.9.30)] 2015 IEEE Custom Integrated Circuits Conference (CICC) - Characterization and simulation methodology for time-dependent variability in advanced technologies

Weckx, P., Kaczer, B., Raghavan, P., Franco, J., Simicic, M., Roussel, Ph. J., Linten, D., Thean, A., Verkest, D., Catthoor, F., Groeseneken, G.

Year:

2015

Language:

english

File:

PDF, 1.13 MB

english, 2015

26

A Systematic Approach to Design Low-Power Video Codec Cores

Denolf, Kristof, Chirila-Rus, Adrian, Schumacher, Paul, Turney, Robert, Vissers, Kees, Verkest, Diederik, Corporaal, Henk

Journal:

EURASIP Journal on Embedded Systems

Year:

2006

Language:

english

File:

PDF, 746 KB

english, 2006

27

SPIE Proceedings [SPIE SPIE Advanced Lithography - San Jose, California, United States (Sunday 21 February 2016)] Design-Process-Technology Co-optimization for Manufacturability X - Toward the 5nm technology: layout optimization and performance benchmark for logic/SRAMs using lateral and vertical GAA FETs

Capodieci, Luigi, Cain, Jason P., Huynh-Bao, Trong, Ryckaert, Julien, Sakhare, Sushil, Mercha, Abdelkarim, Verkest, Diederik, Thean, Aaron, Wambacq, Piet

Year:

2016

Language:

english

File:

PDF, 1.30 MB

english, 2016

28

Statistical Timing Analysis Considering Device and Interconnect Variability for BEOL Requirements in the 5-nm Node and Beyond

Huynh-Bao, Trong, Ryckaert, Julien, Tokei, Zsolt, Mercha, Abdelkarim, Verkest, Diederik, Thean, Aaron Voon-Yew, Wambacq, Piet

Journal:

IEEE Transactions on Very Large Scale Integration (VLSI) Systems

Year:

2017

Language:

english

File:

PDF, 4.25 MB

english, 2017

29

Device Exploration of NanoSheet Transistors for Sub-7-nm Technology Node

Jang, Doyoung, Yakimets, Dmitry, Eneman, Geert, Schuddinck, Pieter, Bardon, Marie Garcia, Raghavan, Praveen, Spessot, Alessio, Verkest, Diederik, Mocuta, Anda

Journal:

IEEE Transactions on Electron Devices

Year:

2017

Language:

english

File:

PDF, 4.59 MB

english, 2017

30

[IEEE 2017 IEEE International Electron Devices Meeting (IEDM) - San Francisco, CA, USA (2017.12.2-2017.12.6)] 2017 IEEE International Electron Devices Meeting (IEDM) - Power aware FinFET and lateral nanosheet FET targeting for 3nm CMOS technology

Yakimets, D., Bardon, M. Garcia, Jang, D., Schuddinck, P., Sherazi, Y., Weckx, P., Miyaguchi, K., Parvais, B., Raghavan, P., Spessot, A., Verkest, D., Mocuta, A.

Year:

2017

Language:

english

File:

PDF, 1.55 MB

english, 2017

31

[IEEE 2019 Electron Devices Technology and Manufacturing Conference (EDTM) - Singapore, Singapore (2019.3.12-2019.3.15)] 2019 Electron Devices Technology and Manufacturing Conference (EDTM) - Extending the roadmap beyond 3nm through system scaling boosters: A case study on Buried Power Rail and Backside Power Delivery

Ryckaert, J., Gupta, A., Jourdain, A., Chava, B., Van der Plas, G., Verkest, D., Beyne, E.

Year:

2019

Language:

english

File:

PDF, 313 KB

english, 2019

32

Use of time‐compressed speech in the assessment of central nervous system disorders

Baran, Jane A., Verkest, Susan, Gollegly, Karen, Kibbe‐Michal, Karen, Rintehlmann, William F., Musiek, Frank E.

Journal:

The Journal of the Acoustical Society of America

Year:

1985

Language:

english

File:

PDF, 714 KB

english, 1985

33

Use of time‐compressed speech in the assessment of central nervous system disorders

Baran, Jane A., Verkest, Susan, Gollegly, Karen, Kibbe‐Michal, Karen, Rintehlmann, William F., Musiek, Frank E.

Journal:

The Journal of the Acoustical Society of America

Year:

1985

File:

PDF, 714 KB

1985

34

[IEEE 2019 Symposium on VLSI Technology - Kyoto, Japan (2019.6.9-2019.6.14)] 2019 Symposium on VLSI Technology - Gait identification using stochastic OXRRAM-based time sequence machine learning

Degraeve, R., Doevenspeck, J., Fantini, A., Debacker, P., Linten, D., Verkest, D.

Year:

2019

File:

PDF, 1.50 MB

2019

35

IGZO-Based Compute Cell for Analog In- Memory Computing--DTCO Analysis to Enable Ultralow-Power AI at Edge

Saito, D., Doevenspeck, J., Cosemans, S., Oh, H., Perumkunnil, M., Papistas, I. A., Belmonte, A., Rassoul, N., Delhougne, R., Kar, G., Debacker, P., Mallik, A., Verkest, D., Na, M. H.

Journal:

IEEE Transactions on Electron Devices

Year:

2020

File:

PDF, 2.67 MB

2020

36

EMPIRE: Empirical power/area/timing models for register files

Praveen Raghavan, Andy Lambrechts, Murali Jayapala, Francky Catthoor, Diederik Verkest

Journal:

Microprocessors and Microsystems

Year:

2009

Language:

english

File:

PDF, 614 KB

english, 2009

37

Run-time support for heterogeneous multitasking on reconfigurable SoCs

T. Marescaux, V. Nollet, J.-Y. Mignolet, A. Bartic, W. Moffat, P. Avasare, P. Coene, D. Verkest, S. Vernalde, R. Lauwereins

Journal:

Integration, the VLSI Journal

Year:

2004

Language:

english

File:

PDF, 669 KB

english, 2004

38

CoWare—A design environment for heterogeneous hardware/software systems

D. Verkest, K. Rompaey, I. Bolsens, H. Man

Journal:

Design Automation for Embedded Systems

Year:

1996

Language:

english

File:

PDF, 1.96 MB

english, 1996

39

On the comparison of HOL and Boyer-Moore for formal hardware verification

C. M. Angelo, D. Verkest, L. Claesen, D. H. De Man

Journal:

Formal Methods in System Design

Year:

1993

Language:

english

File:

PDF, 1.60 MB

english, 1993

40

A proof of the nonrestoring division algorithm and its implementation on an ALU

D. Verkest, L. Claesen, H. De Man

Journal:

Formal Methods in System Design

Year:

1994

Language:

english

File:

PDF, 1.43 MB

english, 1994

41

Exploiting Varying Resource Requirements in Wavelet-based Applications in Dynamic Execution Environments

Bert Geelen, Vissarion Ferentinos, Francky Catthoor, Spyridon Toulatos, Gauthier Lafruit, Thanos Stouraitis, Rudy Lauwereins, Diederik Verkest

Journal:

Journal of Signal Processing Systems

Year:

2009

Language:

english

File:

PDF, 595 KB

english, 2009

42

A Safari Through the MPSoC Run-Time Management Jungle

Vincent Nollet, Diederik Verkest, Henk Corporaal

Journal:

Journal of Signal Processing Systems

Year:

2010

Language:

english

File:

PDF, 434 KB

english, 2010

43

Design and Tool Flow of Multimedia MPSoC Platforms

Bjorn De Sutter, Diederik Verkest, Erik Brockmeyer, Eric Delfosse, Arnout Vandecappelle, Jean-Yves Mignolet

Journal:

Journal of Signal Processing Systems

Year:

2009

Language:

english

File:

PDF, 1.26 MB

english, 2009

44

Description and verification of more-dimensional regular and non-homogeneous structures using a functional hardware description language

W. Ploegaerts, D. Verkest, L. Claesen, H. De Man

Journal:

Microprocessing and Microprogramming

Year:

1989

Language:

english

File:

PDF, 538 KB

english, 1989

45

Application of system semantics to VLSI for the transformational design of a parameterized booth multiplier module — a case study

L. Claesen, R.T. Boute, J. De Man, W. Ploegaerts, M. Seutter, J. Vanslembrouck, D. Verkest

Journal:

Microprocessing and Microprogramming

Year:

1989

Language:

english

File:

PDF, 473 KB

english, 1989

46

Joint hardware–software leakage minimization approach for the register file of VLIW embedded architectures

David Atienza, Praveen Raghavan, José L. Ayala, Giovanni De Micheli, Francky Catthoor, Diederik Verkest, Marisa López-Vallejo

Journal:

Integration, the VLSI Journal

Year:

2008

Language:

english

File:

PDF, 531 KB

english, 2008

47

Conditional, recombinase-mediated expression of genes in plant cell cultures

Jérôme Joubès, Kristof De Schutter, Aurine Verkest, Dirk Inzé, Lieven De Veylder

Journal:

The Plant Journal

Year:

2004

Language:

english

File:

PDF, 169 KB

english, 2004

48

Matisse: A System-on-Chip Design Methodology Emphasizing Dynamic Memory Management

Diederik Verkest, Julio Leao Da Silva, Chantal Ykman, Kris Croes, Miguel Miranda, Sven Wuytack, Francky Catthoor, Gjalt De Jong, Hugo De Man

Journal:

Journal of Signal Processing Systems

Year:

1999

Language:

english

File:

PDF, 291 KB

english, 1999

49

[Lecture Notes in Computer Science] Integrated Circuit and System Design. Power and Timing Modeling, Optimization and Simulation || Systematic Preprocessing of Data Dependent Constructs for Embedded Systems

Paliouras, Vassilis, Vounckx, Johan, Verkest, Diederik

Year:

2005

Language:

english

File:

PDF, 215 KB

english, 2005

50

Power-efficient flexible processor architecture for embedded applications

Vermeulen, F., Catthoor, F., Nachtergaele, L., Verkest, D., De Man, H.

Journal:

IEEE Transactions on Very Large Scale Integration (VLSI) Systems

Year:

2003

Language:

english

File:

PDF, 360 KB

english, 2003

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